This invention relates to a semiconductor memory, and more particularly to a dynamic-RAM (DRAM) comprising an arrangement of a plurality of memory cell arrays with driving circuits for sense amplifiers, etc. 2. Description of the Prior Art
In recent years, semiconductor memory capacities have increased, and as a result it has been common to arrange memory cell arrays into matrix form. It is usually necessary to provide a word driver and sensing circuitry for each memory cell array. There is additionally provided a driving circuit for driving each row of sensing circuits.
As memory capacity increases, the needed number of sensing circuits driven by driving circuits also increases, along with an extension of the signal lines. As the length of the signal line increases, the parasitic capacitance and resistance also increase, and therefore the signal transfer times to different sensing circuits can become considerably different.
One suggested solution to this problem has been to provide additional driving circuit spaced between the sensing circuits. Due to the complexity of the driving circuit, a complete driving circuit will not fit between sensing circuits without expanding the size of the entire matrix. This solution, therefore, greatly increases the size of the matrix and is often not practical.